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PD - 96892
AUTOMOTIVE MOSFET
IRFR2607Z IRFU2607Z
HEXFET(R) Power MOSFET
D
Features
Advanced Process Technology Ultra Low On-Resistance 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax
VDSS = 75V RDS(on) = 22m
Description
Specifically designed for Automotive applications, this HEXFET(R) Power MOSFET utilizes the latest processing techniques to achieve extremely low onresistance per silicon area. Additional features of this design are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
G S
ID = 42A
D-Pak IRFR2607Z Max.
45 32 42 180 110 0.72 20
I-Pak IRFU2607Z Units
A
Absolute Maximum Ratings
Parameter
ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 100C Continuous Drain Current, VGS @ 10V ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current IDM
PD @TC = 25C Power Dissipation VGS EAS (Tested ) IAR EAR TJ TSTG Linear Derating Factor Gate-to-Source Voltage
W W/C V mJ A mJ
EAS (Thermally limited) Single Pulse Avalanche Energyd Single Pulse Avalanche Energy Tested Value Avalanche CurrentA Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw
h
96 96 See Fig.12a, 12b, 15, 16 -55 to + 175
g
C 300 (1.6mm from case ) 10 lbfyin (1.1Nym)
Thermal Resistance
RJC RJA RJA Junction-to-Case
j
Parameter
Typ.
Max.
1.38 40 110
Units
C/W
Junction-to-Ambient (PCB mount) Junction-to-Ambient
j
ij
--- --- ---
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1
9/21/04
IRFR/U2607Z
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
75 --- --- 2.0 36 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 0.074 17.6 --- --- --- --- --- --- 34 8.9 14 14 59 39 28 4.5 7.5 1440 190 110 720 130 230 --- --- 22 4.0 --- 20 250 200 -200 51 --- --- --- --- --- --- --- nH --- --- --- --- --- --- --- pF ns nC nA V m V S A
Conditions
VGS = 0V, ID = 250A VGS = 10V, ID = 30A VDS = 25V, ID = 30A VDS = 75V, VGS = 0V VDS = 75V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V ID = 30A VDS = 60V VGS = 10V VDD = 38V ID = 30A RG = 15 VGS = 10V
V/C Reference to 25C, ID = 1mA VDS = VGS, ID = 50A
e
e e
Between lead, 6mm (0.25in.) from package and center of die contact VGS = 0V VDS = 25V = 1.0MHz VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 60V, = 1.0MHz VGS = 0V, VDS = 0V to 60V
f
Source-Drain Ratings and Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- 30 28 45 A 180 1.3 45 42 V ns nC
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 30A, VGS = 0V TJ = 25C, IF = 30A, VDD = 38V di/dt = 100A/s
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFR/U2607Z
1000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
1000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10
10
4.5V
1
4.5V 60s PULSE WIDTH Tj = 25C
60s PULSE WIDTH Tj = 175C
1 0.1 1 10 100
0.1 0.1 1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.0
60
Gfs, Forward Transconductance (S)
TJ = 25C 50 40 30 20 10 0 0 10 20 30 40 ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current()
100.0
TJ = 175C
10.0
TJ = 175C
1.0
TJ = 25C
VDS = 20V
0.1 2.0 3.0 4.0 5.0 6.0 7.0
60s PULSE WIDTH
8.0 9.0 10.0
VDS = 10V
380s PULSE WIDTH
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance Vs. Drain Current
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IRFR/U2607Z
2400 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd
20
VGS, Gate-to-Source Voltage (V)
ID= 30A VDS = 60V VDS= 30V VDS= 12V
2000
16
C, Capacitance (pF)
1600
Ciss
12
1200
8
800
4
FOR TEST CIRCUIT SEE FIGURE 13
400
Coss Crss
0 1 10 100
0 0 10 20
30
40
50
VDS , Drain-to-Source Voltage (V)
QG Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000.0
1000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA LIMITED BY R DS (on)
ISD , Reverse Drain Current (A)
100.0
100 100sec 10
TJ = 175C
10.0
1.0
TJ = 25C VGS = 0V
1 Tc = 25C Tj = 175C Single Pulse 0.1 1 10 100
10msec 1msec DC 1000
0.1 0.0 0.4 0.8 1.2 1.6 2.0 2.4
VSD , Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFR/U2607Z
50 LIMITED BY PACKAGE 40
ID , Drain Current (A)
RDS(on) , Drain-to-Source On Resistance (Normalized)
2.5
ID = 30A
2.0
VGS = 10V
30
1.5
20
10
1.0
0 25 50 75 100 125 150 175 TC , Case Temperature (C)
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (C)
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10. Normalized On-Resistance Vs. Temperature
10
Thermal Response ( Z thJC )
1
D = 0.50 0.20 0.10 0.05 0.02 0.01
J J 1
0.1
R1 R1 2
R2 R2 C 2
Ri (C/W) i (sec) 0.71826 0.000423 0.66173 0.004503
1
0.01
Ci= i/Ri Ci i/Ri
SINGLE PULSE ( THERMAL RESPONSE )
0.001 1E-006 1E-005 0.0001 0.001
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.01 0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFR/U2607Z
EAS, Single Pulse Avalanche Energy (mJ)
15V
400
VDS
L
DRIVER
300
ID 3.5A 4.8A BOTTOM 30A
TOP
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
200
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
100
0 25 50 75 100 125 150 175
Starting TJ, Junction Temperature (C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS
QGD
VGS(th) Gate threshold Voltage (V)
5.0
ID = 1.0A
4.5
VG
ID = 1.0mA ID = 250A ID = 50A
4.0
Charge
Fig 13a. Basic Gate Charge Waveform
3.5
3.0
L
0
2.5
DUT 1K
VCC
2.0 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Temperature ( C )
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage Vs. Temperature
6
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IRFR/U2607Z
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
0.01
10
0.05 0.10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax
1
0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
100
EAR , Avalanche Energy (mJ)
80
TOP Single Pulse BOTTOM 1% Duty Cycle ID = 30A
60
40
20
0 25 50 75 100 125 150
Starting TJ , Junction Temperature (C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 16. Maximum Avalanche Energy Vs. Temperature
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IRFR/U2607Z
Driver Gate Drive
D.U.T
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
RD
VDS VGS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-VDD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
8
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IRFR/U2607Z
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
6.73 (.265) 6.35 (.250) -A5.46 (.215) 5.21 (.205) 4 1.27 (.050) 0.88 (.035)
2.38 (.094) 2.19 (.086)
1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018)
6.22 (.245) 5.97 (.235) 1.02 (.040) 1.64 (.025) 1 2 3 -B1.52 (.060) 1.15 (.045) 3X 2X 1.14 (.045) 0.76 (.030) 0.89 (.035) 0.64 (.025) 0.25 (.010) M AMB
6.45 (.245) 5.68 (.224) 10.42 (.410) 9.40 (.370) 0.51 (.020) MIN. LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
0.58 (.023) 0.46 (.018) NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2.28 (.090) 4.57 (.180)
2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-252AA. 4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP, SOLDER DIP MAX. +0.16 (.006).
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFR120 WIT H AS S EMBLY LOT CODE 1234 AS S EMBLED ON WW 16, 1999 IN T HE AS S EMBLY LINE "A"
N ote: "P" in ass embly line pos ition indicates "Lead-Free"
INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE
PART NUMBER
IRFR120 12 916A 34
DAT E CODE YEAR 9 = 1999 WEEK 16 LINE A
OR
INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE
PART NUMBER
IRFR120 12 P916A 34
DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPT IONAL) YEAR 9 = 1999 WEEK 16 A = AS S EMBLY S IT E CODE
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9
IRFR/U2607Z
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
6.73 (.265) 6.35 (.250) -A5.46 (.215) 5.21 (.205) 4 6.45 (.245) 5.68 (.224) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 0.58 (.023) 0.46 (.018) LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
1.52 (.060) 1.15 (.045) 1 -B2.28 (.090) 1.91 (.075) 2 3
6.22 (.245) 5.97 (.235)
NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 9.65 (.380) 8.89 (.350) 2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-252AA. 4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP, SOLDER DIP MAX. +0.16 (.006).
3X
1.14 (.045) 0.76 (.030)
3X
0.89 (.035) 0.64 (.025) M AMB
1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018)
2.28 (.090) 2X
0.25 (.010)
I-Pak (TO-251AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFU120 WIT H AS S EMBLY LOT CODE 5678 ASS EMBLED ON WW 19, 1999 IN T HE AS S EMBLY LINE "A" Note: "P" in as sembly line pos ition indicates "Lead-Free" INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER
IRFU120 919A 56 78
DAT E CODE YEAR 9 = 1999 WEEK 19 LINE A
OR
INTERNAT IONAL RECT IFIER LOGO ASS EMBLY LOT CODE
PART NUMBER
IRFU120 56 78
DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPT IONAL) YEAR 9 = 1999 WEEK 19 A = AS S EMBLY S IT E CODE
10
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IRFR/U2607Z
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL
16.3 ( .641 ) 15.7 ( .619 )
16.3 ( .641 ) 15.7 ( .619 )
12.1 ( .476 ) 11.9 ( .469 )
FEED DIRECTION
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481.
Repetitive rating; pulse width limited by
Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . max. junction temperature. (See fig. 11). Limited by TJmax, starting TJ = 25C, L = 0.21mH Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive RG = 25, IAS = 30A, VGS =10V. Part not avalanche performance. recommended for use above this value. This value determined from sample failure population. 100% Pulse width 1.0ms; duty cycle 2%. tested to this value in production. When mounted on 1" square PCB (FR-4 or G-10 Material) . For recommended footprint and soldering techniques refer to application note #AN-994 R is measured at TJ approximately 90C Data and specifications subject to change without notice. This product has been designed for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site.
Notes:
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.9/04
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